Notes on capacitors, part 1: ceramics & MLCCs
I’ve been reading about capacitors a lot lately. Not just their high-level circuit behaviours, but also their materials and physical properties. I put together a heap of notes on the topic. Knowing me, these notes will languish in my documents folder and I’ll never look at them again. And that’s ok, because that’s just how my brain works, but it occurs to me that someone else might find these notes useful.
As such, I’ve transformed them into something more readable, and that’s what this blog post is. I’ve attempted to be clear about definitions of terms, to make it a little less daunting to follow if you’re not familiar with concepts like relative permittivity and ferroelectricity, but this is mostly going to be useful if you’re already familiar with capacitors and just want a big infodump to read through to pick up some interesting new facts.
Note that I am not an expert on capacitors. I’m a self-taught electronics nerd with no formal EE education. The information in this blog post has been sourced from a heap of different places and I’ve made an effort to correlate information from multiple sources to ensure accuracy, but please don’t presume that this is an encyclopaedic reference.
A ceramic capacitor is characterised by a ceramic dielectric material sandwiched between two electrodes. A multi-layer ceramic capacitor (MLCC) is a kind of ceramic capacitor made from many layers instead of just one. These layers act like parallel capacitors.
The capacitance of a multi-layer ceramic capacitor is defined by:
Where ε0 is the vacuum permittivity, εr is the relative permittivity (also known as the dielectric constant, K) of the capacitor’s dielectric, A is the surface area of the electrode plates, n is the number of electrode layers (2 being the minimum), and d is the thickness of the dielectric layer.
Most capacitor manufacturers will use the term “dielectric constant” rather than “relative permittivity” when talking about dielectric materials. They are exactly the same thing by different names. Relative permittivity is usually the favoured term of physicists and material scientists, whereas dielectric constant tends to be used by electronics people.
The capacitance of a ceramic capacitor arises from either paraelectric or ferroelectric polarisation of the dielectric material. When you apply a voltage across the capacitor it creates an electric field in the dielectric. This electric field causes the material’s molecules to either become polarised in the same direction as the field, or have their existing polarisation aligned in the same direction as the field. The change in polarisation is related to a change in surface charge.
The dielectric constant describes the strength of the electric field that can be established inside the dielectric material. It is unitless and essentially just acts as a multiplier for the vacuum permittivity. A higher dielectric constant implies a higher amount of capacitance achievable per unit volume of material.
There are three major classes of ceramic capacitor dielectric.
Class I ceramic capacitors (e.g. C0G, U2J) are typically made from materials such as calcium zirconate or titanium dioxide. These dielectrics are paraelectric in nature. This means that the molecules in their crystalline lattices exhibit no polarisation when no electric field is present (i.e. they have no spontaneous polarisation), and applying an electric field causes them to become polarised. As soon as you take the electric field away, the polarisation goes away.
These materials have a relatively low dielectric constant (200 or less), and therefore tend to have limited capacitance. However, they exhibit very stable capacitance vs. temperature and DC bias voltage, and are very stable over long periods of time. Since the capacitance is very stable, it is possible to achieve fairly precise capacitance values with Class I dielectrics. They’re also less susceptible to self-heating behaviours than Class II dielectrics.
Class II ceramic capacitors (e.g. X5R, X7R) are typically made from barium titanate. These dielectrics are ferroelectric in nature. The molecules in their crystalline lattices form domains whose dipoles are spontaneously polarised, even without the presence of an electric field. When an electric field is applied, the dipoles align to the field in a process known as spontaneous polarisation reversal. When the electric field is taken away, the dipoles go back to being spontaneously polarised. However, unlike in Class I dielectrics, this behaviour has some hysteresis and memory effects - the degree of spontaneous polarisation reversal and return has a nonlinear relationship with the strength of the electric field.
Class II dielectrics make up the majority of all ceramic capacitors sold today, especially in the MLCC market. Barium titanate dielectrics have high dielectric constants (typically 200 to 14000), which enables construction of small capacitors with a very large capacitance.
The downside of Class II ceramic capacitors is that they have poorer temperature stability, a large loss of capacitance vs. DC bias, undergo self-heating, and can introduce some distortion. They also have a behaviour that is typically referred to as “aging”, but this is a bit of a misnomer. I’ll get into that shortly.
Since Class II ceramic capacitors tend not to have very precise capacitance, but they do have a lot of capacitance in a small package, they’re typically used for decoupling applications, as well as bulk capacitance applications where space is constrained or another capacitor technology (aluminium electrolytic, tantalum polymer) would be expensive or have undesirable parasitic properties.
The DC bias derating issue is one of the main practical detractors of Class II MLCCs. If you have a 4.7μF 15V MLCC and you apply a small signal with a 12V DC offset, you’ll find that it has lost 80-90% of its capacitance and only has a few hundred nanofarads left. Even at just 3.3V or 5V of DC bias, you may see 20-50% of the capacitance gone.
This behaviour is due to something called spontaneous polarisation reversal inhibition. Remember that barium titanate dielectrics form magnetic domains whose dipoles are spontaneously polarised, and when you apply an electric field those dipoles begin to align to the field. As you apply a higher voltage across the capacitor, the strength of the electric field grows, and more dipoles are aligned to the field, leaving fewer and fewer in the spontaneously polarised state. Since barium titanate dielectrics are ferroelectric rather than paraelectric, they exhibit some nonlinear hysteresis, which makes it harder for the dipoles in the strong DC electric field to “respond” to a smaller overlaid AC electric field and revert back to their spontaneous polarisation state. This causes the effective capacitance of the dielectric to become “depleted” as the DC bias voltage rises.
Tier 1 capacitor manufacturers like AVX, KEMET, Murata, Samsung, etc. will provide graphs showing the DC bias derating as a percentage of the total capacitance. Other manufacturers might not offer this information.
For decoupling in power delivery networks, you really need to pay attention to DC bias derating, especially at 5V or higher. Luckily, MLCCs are very cheap these days, so you can get 10uF 0603 package capacitors that’ll retain around a third of their nominal capacitance at 5V DC bias for around half a penny. When using JLCPCB’s assembly service, I’m a fan of CL10A106KP8NNNC for pretty much all decoupling - it’s in their basic parts catalogue (no reel loading charge) and is rated for up to 10V. You can view the full specs and performance graphs, including DC bias derating, here.
Larger capacitors allow for larger capacitance at a given rated voltage. The dielectric strength and voltage withstand of the material depends on a few factors, but typically there is a trade-off between capacitance, voltage rating, and size. You won’t find a 50V 47uF X7R 0201 MLCC, at least unless someone invents some fancy new technology.
One point of note here is that X7R is slightly less susceptible to DC bias derating than X5R due to increased layer thicknesses. The difference is small but if you’re pushing the limits then you might want to consider X7R over X5R.
The nonlinear hysteresis is where the distortion issue arises from. An AC voltage across a Class II MLCC may induce some nonlinearity in the capacitance, which in turn affects the signal.
The boundaries of the domains within the dielectric, known as domain walls, undergo some heating when adjacent domains are polarised in different directions. You can picture this a little like friction between rotating blocks rubbing against each other. The degree of heating depends on a number of factors, but there are certain frequencies that tend to cause more heating than others. Note that this is a separate behaviour to self-resonance, which is related to the parasitic inductance of the capacitor.
The amount of parasitic inductance in a Class II capacitor (and Class I for that matter) is almost entirely correlated with the size of the part. Smaller parts have smaller inductance. There are some fancy “low DCL” parts that push the inductance lower through specialised construction methods, but for the most part it’s about the physical size of the MLCC package.
I mentioned earlier that Class II MLCCs undergo an “aging” process, but that this term is a misnomer. This is something that I first heard James Lewis from KEMET talk about, and I had to do a lot of digging to confirm that he was indeed correct because a lot of the literature talks about this behaviour in the wrong way.
Class II MLCCs undergo capacitance loss at a rate of roughly 1.5% per decade-hour after a heating event. By “decade-hour” I mean after 1, 10, 100, 1000, etc. hours, i.e. log base 10. This refers to a general trend - remember that capacitance tolerances are typically ±20% or wider on most Class II MLCCs. The mention of the heating event is frequently omitted from the description of the behaviour, and many references just talk about it like an innate process that continues for all time. However, when you heat a capacitor up it actually resets this process. You can repeat it as many times as you like, and it will always follow the exact same loss pattern over time. The industry standard among Tier 1 capacitor manufacturers is to rate X5R and X7R at 1000 hours post-heat. As such, when you solder a capacitor to your board, you heat it up and reset its “aging” back to zero hours. After an hour the capacitance will be roughly 4.5% higher than its nominal rating. After ten hours it’ll be 3% higher. After 100 hours it’ll be 1.5% higher. After 1000 hours it’ll be back at nominal. After 10000 hours it’ll be 1.5% lower than nominal, and so on and so forth. Heat it up, you’re back at zero. This occurs both on the shelf and in-circuit. The fact that it is fully resettable is why the term “aging” is a misnomer.
This behaviour is rather important if you’re doing repairs or rework on anything that involves calibration, because there is a large shift in capacitance in the first couple of days. If you calibrate a device an hour or two after you’ve worked on it, you might find that it fails self-test or produces inaccurate results a few days later. Always wait a couple of days after repair before running calibration!
Finally, we have Class III dielectrics. These are used in older capacitor tech known as “barrier layer” capacitors. They’re typically a doped form of barium titanate and have extremely high dielectric constants, but they can only be constructed in single layers, and they have a bunch of other undesirable properties that make them less useful. They used to be useful back in the 80s, before we figured out how to really leverage Class II stuff, but now they’re essentially obsolete technology.
In part two I’ll talk about aluminium electrolytic capacitors. In part three I’ll talk about tantalum capacitors. In part four I’ll very briefly talk about supercapacitors, and wrap up with some references and links to useful materials and talks.
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